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This page is about the Field Programmable Gate Array (FPGA) chip technology developed by the original Algotronix between its founding in 1989 by Irene Buchanan, John Gray and Tom Kean and its acquisition by Xilinx in 1993. This work pioneered the use of FPGA chips working in close co-operation with microprocessors to address computational applications.
This photo-album is based around the limited number of pictures available, additional contributions from anyone who interacted with Algotronix are very welcome. If you are a former customer of Algotronix and would like a link to your web page from this one please ask!
Pre-Algotronix Research at Edinburgh University
1985
Research work begins on the CAL architecture. This work is done by Tom Kean and supervised by Dr. John Gray and Dr. David Rees. Initial explorations are based on a 6um NMOS process.
1987
The first CAL architecture device is manufactured in 4um double metal CMOS on a multi-project chip. This CLA device is programmed by the final metal layer - it implements a digital stopwatch. The RAM programmed CAL technology was seen as a prototyping technology which could be directly converted into this more efficient mask programmed technology.
1988
The CAL256 chip, the first SRAM programmed member of the CAL family, with 256 programmable cells, manufactured by ES2 in 2um double metal CMOS. Unlike later CAL chips this device had a primitive serial programming interface (much like contemporary commercial FPGA's).
Development at Algotronix
1989
Algotronix is formed and work starts on the CAL1024 chip, 1024 programmable cells in 1.5um double metal CMOS manufactured by ES2. This is the first FPGA to offer random access to its control memory and to provide signal sharing on I/O's to facilitate building arrays of devices. The project is funded by the Scottish Development Agency (now Scottish Enterprise).
1990
The CHS2x4 custom computer, an ISA card containing up to 8 user configurable CAL1024 arrays is shipped to UK Universities participating in the Scottish Enterprise project.
1991
Algotronix' marketing brochure for the CHS2X4 is released.
Byte Magazine publishes a feature on the CHS2x4.
Algotronix CHS2x4 custom computer is a finalist in EDN Magazine's innovation of the year award.
Algotronix' CHS2x4 custom computer appears on the cover of Scotish Enterprise's directory of electronics companies in Scotland.
1992
Algotronix receives a SMART award from the UK government to fund development of interactive debugging tools which take advantage of the unique memory mapped interface on the CAL1024 chip.
Algotronix CAL1024 chips are used as a computational comprocessor in the Chameleon workstation designed at by Cuno Pfister and Beat Heeb at ETH Zuerich. This is the first system to closely couple FPGA's to a general purpose computer.
1993
The architecture for a next generation CAL chip is defined and the technology is marketed to established semiconductor companies. The technology is acquired by Xilinx Inc. and forms the basis of the XC6200 family of FPGA's. Algotronix is shut down and the staff join Xilinx.
XC6200 Development inside Xilinx
1993-1998
The XC6200 FPGA product family including chips, boards and supporting CAD tools is developed and marketed by Xilinx. The family and the PC based demonstration board designed to support it is very popular with the research community but for a variety of technical and non-technical reasons is not successful commercially.
The XC6264 chip was on the cover of the June 1997 Scientific American.
1998
Xilinx decides to discontinue the XC6200 product family. Several years later ideas pioneered by XC6200 including hierarchical interconnect, dynamic reconfiguration and close interfacing between processors and FPGAs begin to re-emerge in Xilinx's mainstream product families.
Tom Kean buys the Algotronix name back from Xilinx and Algotronix is reformed as an independent consulting company.
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